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Glossary of electronics
engineering terms
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
For terms not found in this glossary, try using the following links:
|
A |
Symbol for ampere. |
|
abstract |
To simplify. |
|
ABT |
Acronym for Advanced BiCMOS Technology, as in 74ABT245. |
|
ABTE |
Acronym for Advanced BiCMOS Technology/Enhanced logic,
as in 74ABTE245. |
|
ABTH |
Acronym for Advanced BiCMOS Technology logic with
bus-Hold, as in 74ABTH245. |
|
AC |
Acronym for Alternating Current. |
|
AC |
Acronym for Advanced CMOS logic, as in 74AC245. |
|
accuracy |
1. The extent to which a given measurement, or the
average of a set of measurements, agrees with the true value for that
measurement. 2. Agreement between simulation results and lab
measurements. |
|
ACL |
Acronym for Advanced CMOS Logic, as in 74ACL245. |
|
ACT |
Acronym for Advanced CMOS logic with TTL compatible
inputs. |
|
AEA |
Acronym for American Electronic Association. |
|
AEA |
Acronym for American Engineering Association. |
|
AHDL |
Acronym for Analog Hardware Description Language. |
|
AMS |
Acronym for Analog Mixed-Signal (hardware description
language). |
|
analog |
Information represented as continuously varying voltage
or current rather than in discrete levels as opposed to digital data
varying between two discrete levels. |
|
ANOVA |
Acronym for Analysis Of Variance |
|
ANSI |
Acronym for American National Standards Institute. |
|
AQL |
Acronym for Acceptable Quality Level. |
|
ASCII |
Acronym for American Standard Code for Information
Interchange. |
|
ASIC |
Acronym for Application Specific Integrated Circuit. |
|
ASTM |
Acronym for American Society for Testing and Materials. |
|
AWE |
Acronym for Asymptotic Waveform Evaluation. Model order
reduction. Such as reducing a large RC network to a smaller RC network
for faster simulation. This modeling method has known frequency limits
for accuracy. |
Top
|
behavioral model |
Provides data on behavior at the input and output ports
of a device. What the device consists of internally remains a black
(opaque) box. Usually used when scanning a large design for the
first time. At that point speed is desired over detail.
|
|
behavioral modeling |
System-level modeling consisting of a functional
specification plus modeling of the timing of an implementation. A
behavioral model consists of an HDL description of a device or
component, which is expressed at a relatively high level of abstraction
(higher than the register-transfer level or gate level). It uses
underlying mathematical equations to represent the functional behavior
of the component. See also functional modeling.
|
|
BEM |
Acronym for older Boundary Element
Method. Method of numerical computational electromagnetics. Dates from
before the 1980s. Requires ground plane. |
|
BER |
Acronym for Bit Error Rate. |
|
BGA |
Acronym for Ball Grid Array. |
|
BiCMOS |
Acronym for Bipolar Complementary Metal Oxide
Semiconductor. |
|
BIRD |
Acronym for Buffer Issue Resolution Document – IBIS
Committee. |
|
BJT |
Acronym for Bipolar Junction Transistor. |
|
BNC |
Acronym for Bayonet Neill Concelman Connector. |
|
BOM |
Acronym for Bill Of Materials. |
|
BSIM |
Acronym for
Berkeley Short-channel IGFET Model. |
|
BTL |
Acronym for Backplane Transceiver Logic, as in 74BTL245. |
Top
|
C |
1. Symbol for capacitance. 2. Abbreviation for degrees
Celsius/Centigrade. |
|
CAD |
Acronym for Computer Aided Design. |
|
CAE |
Acronym for Computer Aided Engineering. |
|
CAM |
Acronym for Computer Aided Manufacturing. |
|
CB |
Acronym for Complementary Bipolar, as in 74CB245. |
|
CEM |
Acronym for Computational Electromagnetics. |
|
characteriza-tion model |
Another term for a device’s data sheet. Displays the
behavior of various properties over current, frequency, temperature,
population spread, etc. Characterize means to describe and depict. |
|
circuit |
Interconnection of components to provide an electrical
path between two or more components. |
|
CISPR |
Acronym for Comité Internationale Spécial des
Perturbations Radioelectrotechnique. |
|
CMC |
Acronym for Compact Model Council. |
|
CML |
Acronym for Current Mode Logic. |
|
CMOS |
Acronym for Complimentary Metal Oxide Semiconductor. |
|
CMRR |
Acronym for Common Mode Rejection Ratio. |
|
Confidence interval |
A statistical range with a specified probability that a
given parameter lies within the range. |
|
Confidence level |
Example: Suppose an opinion poll predicted that, if the
election were held today, the Conservative party would win 60% of the
vote. The pollster might attach a 95% confidence level to the interval
60% plus or minus 3%. That is, he thinks it very likely that the
Conservative party would get between 57% and 63% of the total vote. |
|
Confidence limit |
Either of the two numbers that specify the endpoints of a
confidence interval. |
|
correlation |
1. How well a set of measurements agrees with a separate
set of measurements on the same group of units. One or more attributes
may be used. 2. Process of making a quantitative comparison between two
sets of data. Also, from the word roots co: together and relation. |
|
correlation metric |
A means of quantifying agreement between two sets of
data. |
|
COTS |
Acronym for Commercial Off-The-Shelf apparatus. |
|
CPD |
Acronym for Cumulative Probability Distribution
(function). |
|
crosstalk |
The amount of signal from one conductor that gets coupled
onto an adjacent conductor through the mutual capacitance and inductance
between them. The magnitude of the effect is always a fraction of the
active, or aggressor, net upon the passive, or victim, net. The amount
of coupling depends on the proximity of the nets, the proximity of any
ground/power plane, the length of any parallel runs, the risetime of the
driving signal and the dielectric medium between them. |
|
current carrier |
A current carrier is either a conduction band electron or
a conduction band hole. |
Top
|
DARPA |
Acronym for Defense Advanced Research Projects Agency. |
|
data sheet |
Documentation created after the properties and behavior
of a population of devices, from a statistically in-control
process, are characterized. |
|
dB |
Acronym for decibel. The number of decibels denoting the
ratio of the two amounts of power being ten times the logarithm to the
base 10 of this ratio. With P1 and P2 designating two amounts of power
and n the number of decibels denoting their ratio.(ANSI C63.14 – 1992) N
= 10log10 (P1/P2) dB |
|
dBmV/m |
Symbol for decibels-micro-Volts per meter. where dBmv =
20 log [Signal (mV)/1mV] Decibels relative to one microvolt across same
resistance. |
|
DC |
Acronym for Direct Current. |
|
detailed physical model |
A device model wherein its internal detail is described
as closely as possible. There is usually a close correlation with the
physical construction of the device. |
|
device |
A component or part. |
|
DFM |
Acronym for Design For Manufacturability. |
|
DFT |
Acronym for Design For Test. |
|
DIE |
Acronym for Die Information Exchange. |
|
dielectric |
Dielectric materials are
poor conductors of electricity, and
are insulators that are used to provide separation
between conductors. Dielectric
materials can be made to hold an electrostatic charge while dissipating
minimal energy in the form of heat. Glass, porcelain, mica, rubber,
plastics dry air, vacuums and some liquids and gases are dielectric.
For example: air, FR4, and GETEK. |
|
dielectric constant (relative) |
An inherent property of dielectric materials that
determines the amount of electric charge that can be stored. The higher
the constant,
e, the higher the energy
stored in the material’s capacitance.
e
is usually measured and reported in formulas relative to air (er).
Air then gets an
er,
= 1. FR4 often has a low frequency
er
= 4.3 depending on starting materials and processing. In solid
dielectrics
er
will fall off starting with high frequencies while
signal attenuation increases.
er
affects transmission line behavior, particularly characteristic
impedance (Zo) and propagation delay (td). The changes in td
with frequency cause decreased delay leading to dispersion, or
spreading distortion, of a time domain pulse that is composed of many
frequencies. |
|
digital |
Data varying between two discrete levels. Electronic
signals or switches based on discrete, binary electrical levels (ones
and zeros) found in such products as touch-tone telephones and audio
compact disk players. These signals are either ON or OFF, HIGH or LOW,
YES or NO. The mathematical description in digital products is simple,
since it is either ON or OFF. |
|
DIP |
Acronym for Dual InLine Package. |
|
discrete |
As in discrete component. Package containing only a
single component as opposed to an integrated circuit containing many
components in a single package. |
|
dispersion |
1. The scattering of values of a measurement around the
mean or median of the measurement.2. A distribution. |
|
dispersion, dielectric |
A high frequency effect in dielectric materials. At high
frequencies the dielectric constant decreases causing an increase in
propagation velocity and a dispersion in arrival times of wave frequency
components. |
|
DML |
Acronym for Device Modeling Language (Cadence)
and associated .dml files. |
|
documentation |
Reports such as data sheets, process control, product
characterization, process characterization, and models. May be produced
by either the supplier or customer to describe or depict the
semiconductor process. |
|
DOE |
Acronym for Design Of Experiments. |
|
doping |
The process of adding impurity atoms to intrinsic (pure)
silicon or germanium to improve the conductivity of the semiconductor
material. |
|
DSP |
Acronym for Digital Signal Processing. |
|
DTL |
Acronym for Diode-Transistor Logic. |
|
DUT |
Acronym for Device Under Test. |
Top
|
Early effect |
A behavior in narrow base BJT transistors named for Dr.
J. Early who explained it. The effect is an increase in b due to base
narrowing caused by increasing base-collector bias voltage. |
|
EBD |
Acronym for Electronic Board Description (IBIS) and the
associated .ebd files. |
|
ECL |
Acronym for Emitter Coupled Logic. |
|
EDA |
Acronym for Electronic Design Automation. EDA software
tools or tool suites may display simulator output for analysis (as in
waveform analyzers) or which may analyze the reliability,
electromagnetic interference, metal migration, signal integrity, or
thermal characteristics of a design. The tools in this category may work
at any level of abstraction — behavioral, register-transfer-level (RTL),
gate-level, or with the physical layout of an IC device or electronic
system. |
|
EDIF |
Acronym for Electronic Design Interchange Format. |
|
EIA |
Acronym for Electronic Industries Association. |
|
EIAJ |
Acronym for Electronics Industries Association of Japan. |
|
EKV |
Acronym for Enz-Krummenacher-Vittoz model. |
|
ElectroMagnetic Integrity |
The technical discipline of designing for ElectroMagnetic
Control (EMC) and low ElectroMagnetic Interference (EMI), so that one
circuit (or equipment) does not interfere with another circuit (or
equipment). The design task begins with designing for good Signal and
Power Integrity and adds the concerns of coupling and radiation. The
noise energy available to the coupling and radiation mechanisms can be
suppressed with good Signal and Power Integrity. The next step is good
design control over coupling and radiation mechanisms. These additional
actions include controlling: shielding; cabling; leakage; board
resonances; enclosure resonances; structural behavior that operates as
an antenna. |
|
EM |
Acronym for ElectroMagnetic. |
|
EMC |
Acronym for ElectroMagnetic Compatibility. The capability
of Electrical and Electronic Systems, equipment and devices to operate
in their intended electromagnetic environment within a defined margin of
safety, and at design levels of performance, without suffering or
causing unacceptable degradation as a result of electromagnetic
interference (ANSI C63.14 – 1992). |
|
EMI |
Acronym Electromagnetic Interference. The electromagnetic
disturbances (electronic noise) in an environment that can affect an
electronic device, or that which is being produced by an electronic
device, or both. EMI analysis tools are used to verify EMC compliance
during the design of high-speed PCBs and IC packages. The traditional
EMI remedies involve the addition of extra components, metal shields,
metal plans, or even redesigning the entire system. Synonym:
radio-frequency interference. |
|
EMI/EMC |
Acronym for Electromagnetic Interference/Electromagnetic
Control. |
|
equation-based model |
A model based on equations that describe the behavior of
the device, or circuit, modeled. Most importantly, the output as a
function of the input. |
|
ESD |
Acronym for ElectroStatic Discharge. A transfer of
electric charge between bodies of different electrostatic potential in
close proximity or through direct contact (ANSI C63.14 – 1992). |
|
ESS |
Acronym for Environmental Stress Screening. |
|
eV |
Abbreviation for electron-volt. |
Top
|
F |
Symbol for Farad, measure of capacitance. |
|
f |
Abbreviation for frequency. |
|
FACT |
Acronym for Fairchild Advanced Cmos Technology, as in
74FACT245. |
|
FAST |
Acronym for Fairchild Advanced Schottky TTL, as in
74F245. |
|
FCT |
Acronym for Fast Cmos Technology, as in 74FCT245. |
|
FDTD |
Acronym for Finite Difference Time Domain modeling. |
|
FEA |
Acronym for Finite Element Analysis. |
|
FEM |
Acronym for Finite Element Method. Method of numerical
computational electromagnetics. Essentially everybody does some form of
this for field solvers, such as T-lines. |
|
FET |
Acronym for Field Effect Transistor. |
|
FFT |
Acronym for Fast Fourier Transform. |
|
FOM |
Acronym for Figure Of Merit. |
|
FPGA |
Acronym for field programmable gate array. |
|
functional modeling |
Modeling by the use of mathematical functions, algorithms
and formulas. |
Top
|
G |
Symbol for giga, as in10+12 |
|
GaAs |
Acronym for Gallium Arsinide. |
|
GB or Gbit or GBIT |
Acronym for GigaBit. |
|
glue logic |
Small ICs that level shift and otherwise perform simple
functions that enable large blocks of logic (ASICs, microprocessors,
memories) to work together. Thus gluing them together. |
|
GND |
Acronym for GrouND. A reference connection commonly
connected to Earth, whose electric potential is usually equal to zero. |
|
ground bounce |
The transient rise or fall in voltage on a ground plane
or ground pin from its ideal quiescent value of zero due switching
currents on and off through impedance (mostly inductance) in the ground
path. A similar effect on the power plane causes power bounce. The
result is noise on the signal that can decrease signal to noise ratio in
analog circuits or lead to false switching in digital circuits. |
|
GTL |
Acronym for Gunning Transceiver Logic, as in 74GTL245. |
|
GTLP |
Acronym for Gunning Transceiver Logic Plus, as in
74GTLP245. |
|
guard-banding |
The practice of adding safety margin, or extra safety
margin, to specification limits or population distributions. |
Top
|
H |
Abbreviation for Henry, the unit of inductance. |
|
HALT |
Acronym for Highly Accelerated Life Test. |
|
HASS |
Acronym for Highly Accelerated Stress Screening. |
|
HC |
Acronym for High speed Cmos, as in 74HC245. |
|
HCT |
Acronym for High speed Cmos with TTL thresholds, as in
74HCT245. |
|
HDL |
Acronym Hardware Description Language. One of several
specialized high-level languages used by semiconductor designers to
describe the features and functionality of chips and systems prior to
handoff to the IC layout process. HDL descriptions are used in both the
design implementation and verification flows. Currently, the two
standard HDLs in use worldwide are Verilog-HDL and VHDL. Several
proprietary HDLs also exist, mainly for describing logic that is
targeted for vendor-specific programmable logic devices. |
|
high-speed digital design |
The design of digital circuits relative to their analog
behavior. Particularly, where the fast switching edge rates used cause
transmission line effects to become significant. |
|
hole |
A gap left in the covalent bond when a valence electron
gains sufficient energy to jump to the conduction band. |
|
HSDD |
Acronym for High-Speed Digital Design. HSDD, as used in
this book, applies to both active and passive circuit elements. |
|
HSTL |
Acronym for High Speed Transceiver Logic. |
|
HTL |
Acronym for High Threshold Logic. |
|
HTTL |
Acronym for High power Transistor-to-Transistor Logic. |
|
Hz |
Symbol for Hertz, as in cycles per second. |
Top
|
I/O |
Symbol for Input/Output. |
|
IBIS |
Acronym for Input/output Buffer Information
Specification. |
|
IBIS model |
A data file produced in conformance with the IBIS
Specification. The IBIS file, or model, provides necessary data for a
simulator to predict the analog behavior of digital circuits. |
|
IBIS quality levels |
Four levels of increasing quality as defined in the IBIS
quality checklist. |
|
IBIS rise time |
Rise time based on the IBIS [Ramp] specification of 20%
to 80% of 0 Volts to Vcc switching. |
|
IC |
Acronym for Integrated Circuit. |
|
ICEM |
Acronym for Integrated Circuits Electromagnetic Model,
specification 62014-3 from IEC. |
|
ICM |
Acronym for IBIS Interconnect Modeling Information
(specification). Connectors, packages, and interconnections. |
|
ideal-generic models |
Examples: ideal current source, ideal operational
amplifier. |
|
IEC |
1. Acronym for International Engineering Consortium 2.
Acronym for International Electrotechnical Commission |
|
IEEE |
Acronym for Institute of Electrical and Electronics
Engineers. |
|
IGBT |
Acronym for Insulated Gate Bipolar Transistor. |
|
IGFET |
Acronym for Insulated Gate Field Effect Transistor. |
|
impedance |
Measured in ohms, it is the total opposition to the flow
of current offered by a circuit element. Impedance consists of the
vector sum of resistance and reactance. The symbol, or term, for
impedance is Z. |
|
in-control (SPC) |
A statistical process control (SPC) term that means that
only random variation is seen in the process and that there are no
special cause reasons for variation. |
|
IP |
Acronym for Intellectual Property. |
|
ISO |
Acronym for International Standards Organization. |
Top
|
JEDEC |
Acronym for Joint Electron Device Engineering Council. |
|
JFET |
Acronym for Junction Field Effect Transistor. |
|
junction |
Contact or connection between two or more wires or
cables. The area where the p-type material and n-type
material meet in a semiconductor. |
Top
|
K |
Symbol for kilo, as in 1000. |
|
Keyword |
Special words, as used in the IBIS Specification, that
are reserved and set off by square brackets. Example: [File Name]. These
terms are recognized and parsed by simulation software programs. |
Top
|
L |
Symbol for inductance. |
|
LSL |
Acronym for Lower Spec Limit |
|
LSTTL |
Acronym for Low power Schottky Transistor-to-Transistor
Logic, as in 74LSTTL245. |
|
LVC |
Acronym for Low Voltage CMOS, as in 74LVC245. |
|
LVDS |
Acronym for Low Voltage Differential Signaling, as in
74LVDS245. |
|
LVT |
Acronym for Low Voltage Transceiver, as in 74LVT245. |
|
LVTTL |
Acronym for Low Voltage Transistor-to-Transistor Logic,
as in 74LVTTL245. |
Top
|
M |
Symbol for million, 1,000,000. |
|
macromodel |
A model composed of several sub-elements. Used early on
in top-down design approaches or to simplify standard blocks of
circuitry. For example an OpAmp macromodel. Still possesses an ability
to be decomposed into smaller, simpler blocks of circuitry. |
|
majority carrier |
The conduction band electrons in an n-type material and
the valence band holes in a p-type material. Produced by pentavalent
impurities in n-type material and trivalent impurities in p-type
material. |
|
MAST |
Not an acronym, but the abbreviation of MAST AHDL
(language), a registered trademark of Analogy, Inc. |
|
matched |
Condition that occurs when the output impedance of a
source is equal to the input impedance of a load so that maximum power
is transferred between the two. |
|
Matrix model |
A black-box N by N model in the form of a square matrix
where the behavior inside the black box can be characterized by
measurements at its input and output ports. |
|
maximum |
The usual maximum of a property of a population of
devices. Usually defined to be three sigma standard deviations greater
than the mean. |
|
mean (and typical) |
The average of a property of a population of devices. |
|
micron |
A unit of measure equivalent to one-millionth of a meter,
synonymous with micrometer. 1 mil = 1 thousandth of an inch = 25.4
microns. |
|
minimum |
The usual minimum of a property of a population of
devices. Usually defined to be three sigma standard deviations less than
the mean. |
|
minority carrier |
The conduction band holes in n-type material and valence
band electrons in p-type material. Most minority carriers are produced
by temperature rather than by doping with impurities. |
|
model |
A mathematical prediction of the behavior of a physical
system. Also, a functional representation of a device or system. This
representation contains the basic structure and characteristics of a
design object, which is used to perform design verification. During the
development of an electronic system, models are exercised along with
signals entering from the outside environment to simulate the behavior
of the system in software and ensure that it will operate properly
before being manufactured in hardware. |
|
modeling |
The process of using models for analysis and simulation. |
|
MoM |
Acronym for Method of Moments method of numerical
computational electromagnetics. Dates from at least the 1980s. Does not
require ground plane. |
|
MOS |
Acronym for Metal Oxide Semiconductor. |
|
MOSFET |
Acronym for Metal Oxide Semiconductor Field Effect
Transistor. |
|
MTBF |
Acronym for Mean Time Between Failures. |
|
MTTF |
Acronym for Mean Time To Failure. |
|
MTTR |
Acronym for Mean Time To Repair. |
Top
|
n-type semiconductor |
A semiconductor compound formed by doping an intrinsic
semiconductor with a pentavalent element. An n-type material contains an
excess of conduction band electrons. |
|
NA |
1. Acronym for Not Applicable. 2. Acronym for Not
Available. |
|
NASA |
Acronym for National Aeronautics and Space
Administration. |
|
NC |
Acronym for Not Connected. |
|
NDA |
Acronym for Non Disclosure Agreement. |
|
net, or network or topology |
Combination of interconnected components, circuits or
systems. |
|
NIST |
Acronym for National Institute for Standards and
Technology. |
|
NMOS |
Acronym for N-channel Metal Oxide Semiconductor. |
|
Normal distribution |
Population distribution. Synonymous with Gaussian
distribution. Called normal because its shape is the most common
normally seen in nature. |
|
npn |
A bipolar junction transistor in which a p-type base
element is sandwiched between an n-type emitter and an n-type collector. |
Top
|
OEM |
Acronym for Original Equipment Manufacturer. |
Top
|
p |
Symbol for pico, as in 10-12 |
|
parameter |
A variable. A means by which an application or user can
customize the behavior or characteristics of a model instance when it is
created. A parameter is set to a constant value during design entry. |
|
parameterize |
A variable that is assigned a specific value or is
otherwise made into a physical thing, as in a resistor. |
|
parasitic extraction |
Software tools that translate IC and PCB layout data into
networks of electrical circuit elements (transistors, resistors and
capacitors) and parasitic elements (interconnect capacitance and
resistance). |
|
PCB |
Acronym Printed Circuit Board. An electronic interconnect
product, which is the foundation of most electronic systems. PCBs are
used to mount and interconnect chips, capacitors, resistors, and other
discrete components required in a piece of electronic equipment. The
base material of a PCB is called a dielectric and is generally made of
rigid fiberglass, rigid paper, or flexible thin plastic laminates. Those
dielectric substrates are then coated with copper and may be fabricated
into rigid single- or double-sided, multilayer, or flexible circuits.
Also referred to as printed wiring board. |
|
PCI |
Acronym for Peripheral Component Interconnect bus, as in
reflected wave switching. |
|
PD |
Acronym for Probability Distribution (function). |
|
PDS |
Acronym for Power Distribution System. |
|
PECL |
Acronym for Positive/pseudo Emitter Coupled Logic. |
|
PEEC |
Acronym for Partial Element Equivalent Circuit. |
|
physical model |
See detailed physical model. |
|
PI |
Acronym for Power Integrity. |
|
PKG |
Acronym for IBIS Package file denoted .pkg. |
|
PMOS |
Acronym for P-type Metal Oxide Semiconductor. |
|
pnp transistor |
A bipolar junction transistor with an n-type base and
p-type emitter and collector. |
|
Power Integrity |
The technical discipline of maintaining clean power
distribution in electronic equipment. One where the power distribution
system does not transmit noise, and voltages do not sag, bounce or droop
under the demands for power. |
|
PPM or ppm |
Acronym for parts-per-million. |
|
PRBS |
Acronym for Pseudo-Random Bit Sequence. |
|
precision |
The extent to which a given set of measurements are
repeatable. |
|
probabilistic |
Relating to, or governed by, probability. The behavior of
a probabilistic system cannot be predicted exactly but the probability
of certain behaviors is known. Such systems may be simulated using
pseudo-random numbers. |
|
process characterization |
Documentation that describes and depicts a process. |
|
process model |
Model that applies to an entire process from which more
than one device may be manufactured. |
|
product characterization |
Documentation that describes and depicts a product. |
|
PWB |
Acronym for Printed Wiring Board. See PCB. |
|
PWR |
Abbreviation for PoWeR. The rate of generating,
transferring or using energy. |
Top
|
Q |
Abbreviation for Quality factor of a resonant circuit. |
|
QA |
Acronym for Quality Assurance. |
|
QC |
Acronym for Quality Control. |
|
quality |
The measure of a device’s, or population of devices’,
fitness for use. |
Top
|
R |
Symbol for resistance. |
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RASSP |
Acronym for Rapid Prototyping of Application Specific
Signal Processors (DARPA project). |
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reflection coefficient, r |
The fraction of a signal that gets reflected in a
distributed circuit. |
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RF |
Acronym for Radio Frequency. |
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RFIC |
Acronym for RF Integrated Circuit. |
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rise and fall time |
The time for a signal to rise, or fall, from a defined
percentage of output swing to a second defined percentage of output
swing. |
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RMS |
Acronym for Root Mean Square. |
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ROI |
Acronym for Return On Investment. |
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RTL |
Acronym for Resistor Transistor Logic. |
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RTL |
Acronym for Register Transfer Level. A type of HDL
description in which a circuit is modeled by specifying the data flowing
between a set of registers, which are elements of a design that
transition between states based on an event (a high or low edge)
occurring on a clock signal. The register-transfer level of abstraction
is above the gate level and below the behavioral level. |
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SABER |
SABER is not an acronym. It is a registered trademark of
Analogy, Inc., for their SABER analog simulator. |
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safety margin |
An extra margin of tolerance on a spec limit thus
providing an extra margin of safety. |
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saturation |
Condition in which a further increase in one variable
produces no further increase in the resultant effect. In a bipolar
junction transistor, the condition when the emitter to collector voltage
is less than the emitter to base voltage. This condition puts forward
bias on the base to collector junction. |
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Scattering-parameter model |
See S-Parameter model. |
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schematic diagram |
Illustration of an electrical or electronic circuit with
the components represented by their symbols and wire connections
represented by connecting lines. |
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semi |
Abbreviation for semiconductor. |
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semiconductor |
An element that is neither a good conductor nor a good
insulator, but rather lies somewhere between the two. Characterized by a
valence shell containing four electrons. Silicon, germanium and carbon
are the semiconductors most frequently used in electronics. |
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SERDES |
Acronym for Serializer/ De-serializer. High-speed I/O for
Backplane Ethernet, PCI E & XAUI |
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Si |
Abbreviation for Silicon. |
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SI |
Acronym for Signal Integrity. |
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SiGe |
Acronym for Silicon-Germanium. |
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sigma, s |
A standard deviation in a population distribution. A
statistic used as a measure of the dispersion or variation in a
distribution, equal to the square root of the arithmetic mean of the
squares of the deviations from the arithmetic mean. |
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Signal Integrity |
The technical discipline of maintaining the waveform
integrity of a signal so that the digital logic can work properly.
Actions include eliminating reflections, crosstalk, and noise on the
signal. The 1’s and 0’s must be kept clean enough so that they are still
recognized as 1’s and 0’s. |
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simulation |
The process of verifying an electronic design using EDA
software, which reads in models and input/output vectors, exercises the
device under test. The software records the resulting electrical
behavior and timing information for the purpose of identifying and
debugging any incorrect or unexpected behavior. |
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skin effect |
A physical effect on metallic conductors where, as
frequency becomes high enough, electric fields cannot penetrate into the
conductor. All current then gets conducted on the outer surface (i.e.,
skin) of the conductor. The thickness of the skin varies as 1/Öfrequency.
This raises the per unit length resistance of the conductor and its
losses. This is the reason that a hollow metallic waveguide is used, or
even just a dielectric rod, at microwave frequencies to guide signals. |
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SMD |
Acronym for Surface Mount Device. |
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SMT |
Acronym for Surface Mount Technology. |
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S-Parameter model |
A type of Matrix model where the port properties are
characterized by forward and reflected wave scattering coefficients.
Measured into transmission line matched loads. Also know as
Scattering-parameter model. |
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SPC |
Acronym for Statistical Process Control. |
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specsmanship |
The practice of guard-banding specification limits with
more, or less, than sufficient margin, while maintaining the perception
of a well-performing part. |
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SPICE model |
Acronym for Simulation Program with Integrated Circuit
Emphasis. An industry-standard analog simulation language, which
contains many models for most circuit elements and can handle complex
nonlinear circuits. Also refers to a freely distributed simulation tool,
which simulates circuitry described in the SPICE language. By long usage
has become synonymous with SPICE model. |
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SSTL |
Acronym for Stub Series Terminated Logic, as in
74SSTL245. |
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STTL |
Acronym for Schottky Transistor-to-Transistor Logic, as
in 74STTL245. |
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SWR |
Acronym for Standing Wave Ratio. |
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system |
A group of objects operating together. |
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TCAD |
Acronym for Technology Computer Aided Design |
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TDR |
Acronym for Time Domain Reflectometry. |
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TEM |
Acronym for Transverse ElectroMagnetic wave. |
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TLM |
Acronym for Transmission Line Modeling. |
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transmission line |
Any circuit connection where time delay of a signal
propagating down it is large enough so that signal at the receiving end
does not instantaneously follow the signal at the sending end.
Transmission lines are characterized by inherent impedance, Zo, per unit
length that is determined by structure geometry, dielectric and
conductor properties. Not all of the signal can be transferred into the
load if the input impedance at the receiving end does not match the Zo
of the transmission line. A reflection of signal (positive or
negative) will be set up to maintain conservation of energy. In a zero
time delay circuit this means that the signal level at the sending end
would instantaneously adjust to a level consistent with the load. This
tracking of send-receive can get out of step if the round trip time
delay is greater than the rise time of the signal. Then, the conditions
at the sending end, current sent = (generator voltage)/(generator
impedance + transmission line Zo) may not match conditions at the
receiving end, current accepted = (generator voltage)/(transmission
line Zo + receiving end input impedance). If so, signal reflections will
be set up until signal power gets absorbed into the transmit-receive
ends and/or dissipated in the transmission line structure. |
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TTL |
Acronym for Transistor-Transistor Logic. |
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UL |
Acronym for Underwriters Laboratory. |
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USL |
Acronym for Upper Spec Limit |
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V |
Symbol for volt. |
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validation |
To give official confirmation or
approval. Applied to models, it means verifying that the model
correlates with the standard for the model and will run in simulators
available for the purpose. Correlation with the standard for the model
implies there is one and that the model follows the correct syntax,
format, and contains the required data elements. For IBIS it’s possible
to also include an eyeball reality check of things like clamp and
pullup curves |
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VBIC |
Acronym for Vertical Bipolar
Inter-Company. |
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verification |
Applied to models, it means confirmation
that simulation predictions of device and circuit behavior correlate
with lab measurements. For IBIS it’s possible to correlate the IBIS
simulation with a SPICE simulation if the SPICE simulation was verified
by measurements. |
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Verilog |
A hardware description language. An
industry-accepted standard language used by electronic designers to
describe and design their chips and systems prior to fabrication. |
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Verilog-AMS |
Acronym for Verilog Analog Mixed-Signal (hardware
description language) extension to Verilog. |
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VHDL |
Acronym for Very-high-speed-integrated-circuit Hardware
Description Language. An
IEEE-standard hardware description language originally developed by the
U.S. Department of Defense as a common means of documenting electronic
systems. Specified in the IEEE 1076 standard and used by electronic
designers to describe and simulate their chips and systems prior to
fabrication, an alternative language to Verilog.
Also, referred to as
VHSIC. |
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VHSIC |
See VHDL. |
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VLSI |
Acronym for Very Large Scale
Integration. |
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VNA |
Acronym for Vector Noise Analyzer. |
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VRM |
Acronym for Voltage Regulator Module. |
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VSWR |
Acronym for Voltage Standing Wave Ratio. |
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Xtalk |
Acronym for crosstalk. |
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y-parameter model |
A type of matrix model where the port
properties are characterized by input, output, forward and reverse
admittances. Measured into AC short circuits. Also known as admittance
parameter model. |
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z-parameter model |
A type of matrix model where the port
properties are characterized by input, output, forward and reverse
impedances. Measured into AC open circuits. Also known as impedance
parameter model. |
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